Conventionally, a power metal oxide semiconductor field effect transistor (MOSFET) using a silicon substrate (Si substrate) (hereinafter, referred to as a Si power MOSFET) has been mainly used in power MOSFET's, which are one type of power semiconductor devices.
However, a power MOSFET using a silicon carbide substrate (hereinafter, referred to as a SiC substrate) (hereinafter, referred to as a SiC power MOSFET) can achieve a high withstand voltage, and low loss as compared to the Si power MOSFET. The reason is that the silicon carbide (SiC) has a larger band gap as compared to silicon (Si), thus has a high dielectric breakdown withstand voltage, and as a result, capable of securing the withstand voltage even when thinning a drift layer. In other words, since the drift layer is thinned and the dielectric breakdown withstand voltage can be secured even when the drift layer in the SiC power MOSFET is thinned, it is possible to reduce on-resistance of the SiC power MOSFET. Thus, more attention has been given to the SiC power MOSFET in the field of power-saving and/or environmentally-conscious inverter techniques.
A basic structure of the SiC power MOSFET is the same as that of the Si power MOSFET. That is, a drift layer of a first conductivity type is formed on a substrate made of SiC, and a well region of a second conductivity type is formed in a part of the drift layer. Further, a source region of the first conductivity type is formed in a part of the well region, a gate insulating film is formed on a substrate surface of a region called a channel which extends from the source region, via the well region, to the drift layer, and a gate electrode is formed on the gate insulating film. For operation as a transistor, a potential of a top surface of the channel is controlled via the gate insulating film by controlling a potential of the gate electrode, and channel current, that is, current flowing from the source region, via the well region, to the drift layer is controlled.
Here, in general, polycrystalline silicon (polysilicon) and silicon dioxide (silicon oxide: SiO2), which are already proven to be advantageous in the Si power MOSFET, are frequently applied as materials for the gate electrode and the gate insulating film in the SiC power MOSFET as described in Patent Document 1.
In this manner, since the materials proven in the Si power MOSFET, that is, the silicon oxide and the polycrystalline silicon are used in the gate insulating film and the gate electrode in the SiC power MOSFET, it has been expected that the reliability equivalent to that in the case of the Si power MOSFET is maintained.
However, it has been known that it is difficult to achieve the same level of reliability as that in the case of forming the silicon oxide on the Si substrate in the silicon oxide formed on the SiC substrate, and a so-called extrinsic breakdown, in which dielectric breakdown is caused at voltage lower than the original dielectric withstand voltage, is generated with a high probability, for example, as described in Non-Patent Document 1.
The reason why the extrinsic breakdown is frequently generated in the silicon oxide formed on the SiC substrate is that there are many defects in the SiC substrate as compared to the Si substrate. Thus, a technique of forming a highly reliable silicon oxide film on the SiC substrate having many defects has been actively studied, for example, as indicated in Patent Document 2 and Patent Document 3. However, it has not been reported, so far, that the reliability of the gate insulating film is achieved in the SiC power MOSFET as much as the Si power MOSFET.